Power Management IP Microarchitect/Designer
Company: Altera
Location: hillsboro
Posted on: May 3, 2021
Job Description:
Job ID: JR0140478 Job Category: Engineering Primary Location:
Hudson, MA US Other Locations: US, California, Santa Clara;US,
Oregon, HillsboroJob Type: Experienced Hire Power Management IP
Microarchitect/Designer Job Description In this role
responsibilities include, although not limited to: Oversee
definition, design, verification, and documentation for SoC (System
on a Chip) developmentDetermine architecture design, logic design,
and system simulation. Define module interfaces/formats for
simulationPerform logic design for integration of cell libraries,
functional units and subsystems into SoC full chip designs,
register transfer level coding, and simulation for SoCsContribute
to the development of multidimensional designs involving the layout
of complex integrated circuitsPerform all aspects of the SoC design
flow from high-level design to synthesis, place and route, timing
and power to create a design database that is ready for
manufacturing. Analyze equipment to establish operation
infrastructure, conduct experimental tests, and evaluate
resultsReview vendor capability to support development In addition
to the qualifications listed below, the ideal candidate will also
demonstrate the following traits:Highly proactive, self-motivated,
result oriented and goal drivenStrong analytical and communication
skills Passionate, dynamic, self-driven and out-reachingWillingness
to work in highly cross-cultural, cross-disciplinary and
cross-geographic locationsQualificationsYou must possess the below
minimum qualifications to be initially considered for this
position. Preferred qualifications are in addition to the minimum
requirements and are considered a plus factor in identifying top
candidates.Minimum RequirementsCandidate must have a Bachelors
degree in Electrical or Computer Engineering and 9+ years of
industry experience - OR - a Masters degree in Electrical or
Computer Engineering and 6+ years of industry experience.7+ years
of experience in:Design, Architecture and Microarchitecture phases
of IP/SoCIP/SoC Architecture/micro-architecture/design.Workload
analysis, use case analysis performance and power optimizations,
explorations and analysis.Architectural modeling of power,
performance characteristics of complex IPs and SoCsASIC design
flow, EDA tools, Pre/Post Silicon validation process, low power
methodologiesSoC architectures for Mobile and Computing devices and
platformsinteracting and influencing software and driver/firmware
developers to optimize PnPHDL and SV based design and verification
tools and flowsWorking in cross-functional teams and root cause
analysisPreferred Qualifications1+ years of experience in:CPU, DDR,
IO systems, acceleratorsInside this Business GroupThe Silicon
Engineering Group is a worldwide organization focused on the
development and integration of SOCs, Cores, and critical IPs that
power Intel's leadership products. This business group leverages an
incomparable mix of experts with different backgrounds, cultures,
perspectives, and experiences to unleash the most innovative,
amazing, and exciting computing experiences.Other LocationsUS,
California, Santa Clara;US, Oregon, HillsboroPosting StatementAll
qualified applicants will receive consideration for employment
without regard to race, color, religion, religious creed, sex,
national origin, ancestry, age, physical or mental disability,
medical condition, genetic information, military and veteran
status, marital status, pregnancy, gender, gender expression,
gender identity, sexual orientation, or any other characteristic
protected by local law, regulation, or ordinance.... USExperienced
HireJR0140478Hudson
Keywords: Altera, Hillsboro , Power Management IP Microarchitect/Designer, Other , hillsboro, Oregon
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