R&D Engineering, Staff Engineer - 8246
Company: Synopsys
Location: Hillsboro
Posted on: January 24, 2025
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Job Description:
At Synopsys, we drive the innovations that shape the way we live
and connect. Our technology is central to the Era of Pervasive
Intelligence, from self-driving cars to learning machines. We lead
in chip design, verification, and IP integration, empowering the
creation of high-performance silicon chips and software content.
Join us to transform the future through continuous technological
innovation.You Are: As an ideal candidate, you possess a
combination of technical expertise and collaborative skills that
enable you to thrive in a dynamic, fast-paced environment. You are
a proactive problem solver with a deep understanding of analog and
mixed-signal CMOS circuit design. Your proficiency in scripting
languages such as TCL and Python allows you to develop innovative
methodologies that enhance layout efficiency without compromising
quality. You excel in cross-functional team settings, leveraging
your excellent communication skills to ensure alignment and
coordination among geographically distributed teams. Your solid
organizational skills and attention to detail enable you to manage
multiple tasks effectively, while your autonomy and decision-making
capabilities help you navigate interruptions seamlessly. With
experience in advanced FinFET nodes and tools like Custom Compiler
and Cadence Virtuoso, you bring valuable insights into the full
design cycle from RTL to GDSII. You are also familiar with
verification tools such as ICV and Calibre, and have a strong
working knowledge of MS Office Suite applications. You have a
proven track record of working with Jira/Atlassian tools and
possess a minimum of 4 years of related experience, preferably with
an MSEE or BSEE. Your previous experience in analog layout or ASIC
physical design further enhances your qualifications, making you a
key contributor to our innovative team.What You'll Be Doing:*
Propose and develop innovative methodologies to speed up layout
without loss of quality * Work with cross teams in the enablement
of advanced technology nodes, involving planning, collaboration,
and coordination* Measure project and performance using appropriate
systems, tools, and techniques * Establish and maintain
relationships with cross-functional teams, internal and external
customers* Create and maintain comprehensive methodology and
workflow documentation* Act as a technical lead, coordinating with
other team members to develop best-in-class utilitiesThe Impact You
Will Have: * Enhancing the efficiency and quality of layout
methodologies, accelerating time to market for complex mixed-signal
designs* Ensuring alignment and effective collaboration among
geographically distributed teams* Contributing to the development
of advanced technology nodes, pushing the boundaries of innovation
* Building and maintaining strong relationships with
cross-functional teams and customers, fostering a collaborative
environment* Providing comprehensive documentation that supports
the continuous improvement of methodologies and workflows* Leading
technical initiatives that drive the development of best-in-class
utilities, enhancing the overall capabilities of the teamWhat
You'll Need:* Familiarity with physical design of analog and mixed
signal CMOS circuits* Proficient in TCL and/or Python* Exposure and
knowledge of the full design cycle from RTL to GDSII, including
chip level* Excellent communication skills, with the ability to
think and communicate at different levels of abstraction* Solid
organizational skills, including attention to detail and
multi-tasking abilities* Autonomous, timely decision maker, able to
cope with interruptions* Experience with advanced FinFET nodes,
TSMC 16 nanometer and below* Experience with design tools such as
Custom Compiler and Cadence Virtuoso* Familiarity with verification
tools like ICV and Calibre* Experience in working with
Jira/Atlassian tools* Strong working knowledge of MS Office Suite
of applicationsWho You Are:* A proactive problem solver with a deep
understanding of analog and mixed-signal CMOS circuit design *
Excellent communicator with the ability to collaborate effectively
with cross-functional teams * Detail-oriented and organized, able
to manage multiple tasks efficiently* Autonomous and decisive,
capable of navigating interruptions seamlessly * Innovative and
forward-thinking, always seeking to enhance methodologies and
workflows* Experienced and knowledgeable in advanced technology
nodes and design toolsThe Team You'll Be A Part Of:As a member of
the Layout Methodology team, you will be working with local and
global teams in developing capabilities to improve time to market
of complex mixed-signal designs in the latest technology nodes. In
your role, you will be responsible for improving custom physical
design flow using your technical expertise and skills. There will
also be opportunities to act as a technical lead where you will be
coordinating with other team members developing our best-in-class
utilities.You will be part of an advanced physical design team
developing full custom analog and ASIC layout of high-speed
integrated circuits. Your role will be to examine, improve, and
innovate layout methodologies in a very challenging environment and
with tremendous learning and growth potential. Our environment is
best in class with a full suite of IC design tools supplemented by
custom, and in-house tools supported by an experienced software/CAD
team.Rewards and Benefits:We offer a comprehensive range of health,
wellness, and financial benefits to cater to your needs. Our total
rewards include both monetary and non-monetary offerings. Your
recruiter will provide more details about the salary range and
benefits during the hiring process.
Inclusion and Diversity are important to us. Synopsys considers all
applicants for employment without regard to race, color, religion,
national origin, gender, sexual orientation, gender identity, age,
military veteran status, or disability.
In addition to the base salary, this role may be eligible for an
annual bonus, equity, and other discretionary bonuses. Synopsys
offers comprehensive health, wellness, and financial benefits as
part of a of a competitive total rewards package. The actual
compensation offered will be based on a number of job-related
factors, including location, skills, experience, and education.
Your recruiter can share more specific details on the total rewards
package upon request. The base salary range for this role is across
the U.S.
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Keywords: Synopsys, Hillsboro , R&D Engineering, Staff Engineer - 8246, Engineering , Hillsboro, Oregon
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