Senior Physical Design and Timing Engineer - Hardware
Company: Nvidia
Location: Hillsboro
Posted on: January 20, 2023
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Job Description:
We are now looking for a motivated Physical Design and Timing
Engineer to join our dynamic and growing team. If you want to
challenge yourself and be a part of something great, join us
today!NVIDIA has continuously reinvented itself over two decades.
Our invention of the GPU in 1999 sparked the growth of the PC
gaming market, redefined modern computer graphics, and
revolutionized parallel computing. More recently, GPU deep learning
ignited modern AI - the next era of computing. NVIDIA is a
"learning machine" that constantly evolves by adapting to new
opportunities which are hard to solve, that only we can pursue, and
that matter to the world. This is our life's work, to amplify human
inventiveness and intelligence.What you'll be doing:You will drive
physical design and timing of high-frequency and low-power CPUs,
GPUs, -SoCs at block level, cluster level, and/or full chip
level.Help in driving frontend and backend implementation from RTL
to gds2, including synthesis, equivalence checking, floor-planning,
timing constraints, timing and power convergence, and ECO
implementation.What we need to see:BS (or equivalent experience) in
Electrical or Computer Engineering with -5 years experience or MS
(or equivalent experience) with 2 years experience in Synthesis and
TimingSolid experience in full-chip/sub-chip Static Timing Analysis
(STA), timing constraints generation and management, and timing
convergence.Hands on experience in logic synthesis and equivalence
checking/FV required. Deep understanding of hardware architecture
and hands-on skills in RTL/logic design for timing
closure.Expertise in physical design and optimization e.g.
placement, routing, cell sizing, buffering, logic restructuring,
etc. to improve timing and power, along with a background in
implementing them through ECOs.Understanding of DFT logic and
hands-on experience in design closure.Expertise in analyzing and
converging crosstalk delay, noise glitch, and
electrical/manufacturing rules in deep-sub micron
processes.Knowledge in process variation effect modeling and
experience in design convergence taking into account
variations.Experience in critical path planning and crafting
needed.You'll need to have expertise and in-depth knowledge of
industry standard EDA tools.Proficiency in programming and
scripting languages, such as, Perl, Tcl, Make, Python, -etc.Ways to
stand out from the crowd:If you have a background in
high-performance design, such as CPU, implementation and timing
convergence, this is a plusExperience with DFT timing closure for
various modes e.g. scan shift and capture, transition faults, BIST,
etc.Knowledge in circuits, SPICE simulations, and/or transistor
level STA.Experience in methodology and/or flow
development/automation.NVIDIA is widely considered to be one of the
technology world's most desirable employers. We have some of the
most forward-thinking and talented people in the world working for
us. If you're creative and autonomous, we want to hear from you.The
base salary range is $130,000 - $325,000. Your base salary will be
determined based on your location, experience, and the pay of
employees in similar positions.You will also be eligible for equity
and benefits.NVIDIA is committed to fostering a diverse work
environment and proud to be an equal opportunity employer. As we
highly value diversity in our current and future employees, we do
not discriminate (including in our hiring and promotion practices)
on the basis of race, religion, color, national origin, gender,
gender expression, sexual orientation, age, marital status, veteran
status, disability status or any other characteristic protected by
law.SummaryLocation: US, CA, Santa Clara; US, TX, Austin; US, OR,
HillsboroType: Full time
Keywords: Nvidia, Hillsboro , Senior Physical Design and Timing Engineer - Hardware, Engineering , Hillsboro, Oregon
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